1. Field of the Invention
The present invention relates to a power reduction circuit of a display apparatus, and more particularly to a high energy-saving circuit of a display apparatus for effecting an automatic reset on an analog basis when receiving an input signal in an input signal off-mode to perform an associated operation without forming an auxiliary power reduction device that operates a display apparatus in the input signal off-mode.
2. Description of the Prior Art
In supplying power to display apparatuses of computer peripheral equipment, a method for supplying auxiliary power in place of main power to a microprocessor for monitor on/off control has been generally utilized to inhibit unnecessary power dissipation and save electrical power when an input signal is not received for a certain time. A power reduction circuit adopting the method is shown in FIG. 1.
Here, the power reduction circuit is operated by an operational logic in terms of the operational states of horizontal and vertical sync signals for providing data to a screen of the display apparatus via an input device. In other words, the operational logic is classified into: an input signal off-mode for producing the horizontal and vertical sync signals in a DC level when receiving no signal for a certain time, an input signal on-mode for normally producing the horizontal and vertical sync signals when receiving the input signal, an input signal standby mode for normally producing the horizontal sync signal while providing the vertical sync signal in the DC level, and an input signal stop mode for normally producing the vertical sync signal while providing the horizontal sync signal in the DC level.
That is, the main power must be supplied in the on-mode, standby mode or stop mode, but there is no need to supply the main power in the off-mode. Therefore, in order to maintain a standby state of a display output for supplying an output signal when the microprocessor for monitor on/off control monitors the receipt of an input signal in the off-mode, the main power pauses while continuously supplying the auxiliary power in the input signal off-mode to the microprocessor, thereby providing a monitor on/off control signal.
The above-described power reduction circuit is favorable for freely controlling the monitor and, further, can be effectively employed in a system embodying a display data channel system which is one method of gradually maintaining data transmission.
However, the monitor that economizes in terms of power by means of the auxiliary power results in increased cost due to adding the secondary power circuit, raising the need of power due to the operation of the secondary power circuit in the off-mode, and allowing for current flow along a degaussing coil to eliminate magnetism of a circuit connected to an AC power supply terminal and a magnetized magnetic body. Thus, power of at least 5W is wasted by the continuous supply of the power even though the input signal is not received.
A technique concerning the power reduction is suggested in U.S. Pat. No. 4,959,594 which relates to a display system having an electromagnetically deflected cathode ray tube random stroke and periodic raster display, and more particularly to a system of developing bi-directional raster scan for decreasing the power dissipated during the operation of a patch raster mode.